The present invention relates to an insulated gate type field effect transistor and, more particularly, to a non-volatile semiconductive memory device having a floating polysilicon layer, as well as to a method of manufacturing the device.
In the past, various types of electrically programable read only memory device making use of MOS (metal oxide semiconductor) elements have been proposed.
Among these proposed read only memory devices, a device called EPROM (Electrically Programmable Read Only Memory) of nMOS type, manufactured by a double polysilicon layer technique and having a floating type first (underlying) polysilicon layer acting as an electric-charge accumulation layer, is most popular.
As a result of current demand for increased numbers of circuits elements integrated on a single semiconductive substrate, it is becoming a matter of significance to make each memory cell, which constitutes the unit of memory function in semiconductive chips having the ROM of the kind described, as small as possible.
At the same time, it is to be pointed out that the process for manufacturing these semiconductive devices is inevitably rendered complicated, as the density of the integration is increased.